The Cyrix 6x86 (codename M1) is a sixth-generation, 32-bit x86-compatible microprocessor designed by Cyrix and manufactured by IBM and SGS-Thomson. It was originally released in 1996.
The 6x86 is superscalar and superpipelined and performs register renaming, speculative execution, out-of-order execution, and data dependency removal. However, it continued to use native x86 execution and ordinary microcode only, like Centaur's WinChip, unlike competitors Intel and AMD which introduced the method of dynamic translation to micro-operations with Pentium Pro and K5.
Cyrix 6x86
Cyrix 6x86 80GP (P90+)
Cyrix 6x86 P150+GP
Cyrix 6x86MX
Another release of the 6x86, the 6x86MX, added MMX compatibility, introduced the EMMI instruction set, and quadrupled the primary cache size to 64 KB. Later revisions of this chip were renamed MII, to better compete with the Pentium II processor.
Cyrix 6x86MX-PR200
Cyrix MII
The 6x86 successor - MII - was late to market, and couldn't scale well in clock speed with the manufacturing processes used at the time. Similar to the AMD K5, the Cyrix 6x86 was a design far more focused on integer per-clock performance than clock scalability, something that proved to be a strategic mistake. Therefore, despite being very fast clock by clock, the 6x86 and MII were forced to compete at the low-end of the market as AMD K6 and Intel P6 Pentium II were always ahead on clock speed. The 6x86's and MII's old generation "486 class" floating point unit combined with an integer section that was at best on-par with the newer P6 and K6 chips meant that Cyrix could no longer compete in performance.
Cyrix MII 300GP
Cyrix MII 333GP
Unlisted models:
- 6x86: P100+, P120+, P133+, P166+, P200+
- 6x86MX: PR166+, PR233+, PR266+
- MII: 366, 400, 433
RETURN TO CYRIX
RETURN TO THE MAIN MUSEUM PAGE
